簡易檢索 / 詳目顯示

研究生: 李洹
Huan Lee
論文名稱: 氧化釔閘極介電層之電性與漏電流機制研究
Electrical Properties and Leakage Current Mechanism of Y2O3 Gate Dielectrics
指導教授: 劉傳璽
Liu, Chuan-Hsi
程金保
Cheng, Ching-Pao
學位類別: 碩士
Master
系所名稱: 機電工程學系
Department of Mechatronic Engineering
論文出版年: 2010
畢業學年度: 98
語文別: 中文
論文頁數: 94
中文關鍵詞: 氧化釔濺鍍
英文關鍵詞: Y2O3, Al, sputter
論文種類: 學術論文
相關次數: 點閱:180下載:0
分享至:
查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報
  • 本實驗之中,我們成功地製作了Al/Y2O3/p-Si的MOS電容器,我們使用射頻濺鍍法沉積Y2O3薄膜其厚度為7 nm,沉積完後再分別做650、750和850 oC的快速熱退火,最後再沉積Al當作電極。由X-ray繞射儀的分析比較不同退火溫度下的Y2O3薄膜,發現在做完850 oC的快速熱退火之後Y2O3薄膜沒有結晶的產生,顯示Y2O3這個材料有很高的結晶溫度,並且隨著退火溫度的增加在2θ=55o的峰值也跟著上升,其中55o的峰值指的是矽的金屬氧化物。接著利用X-ray光電子能譜儀進行成份的分析,由分析的結果得知的確有矽的金屬氧化物的存在,並且隨著退火溫度的上升,矽的金屬氧化物的含量也是有增加的。
    接下來則是對Y2O3薄膜進行C-V和I-V的量測,首先是C-V量測的結果,隨著退火溫度的上升所量測到的電容值會降低,計算得到的介電常數也跟著下降。其原因是因為由於有矽的金屬氧化物的產生,而矽的金屬氧化物本身的介電常數較低,所以有矽的金屬氧化物的產生會造成整體的介電常數下降。另外I-V的量測結果則顯示,隨著退火溫度的上升所量測到的漏電流會降低,其退火溫度為650和850 oC所量測到的電流值分別為4.56×10-1 A/cm2和3.43×10-2 A/cm2。而原因可能是因為有矽的金屬氧化物的產生,而造成整體的厚度增加使得漏電流下降。

    Ultra-thin yttrium oxide (Y2O3) films were deposited on p-Si(100) substrates by RF sputtering in argon (Ar) ambient at room temperature. The physical thickness of the films was around 7 nm. After deposition, a post-deposition annealing (PDA) in nitrogen (N2) ambient was then performed from 650 to 850 oC. The chemical bonding states and depth profiles of the films were characterized by X-ray photoelectron spectroscopy (XPS) and X-ray reflectivity (XRR),respectively. The crystalline phase of the films was analyzed by X-ray diffraction (XRD). For electrical characterization, aluminum (Al) was deposited as the gate electrode to form the MOS structure. Electrical characterization consisted of high frequency C-V(capacitance-voltage) and J-V (current density-voltage) measurements. According to the XRD patterns, Y2O3 films emain amorphous after 850 oC annealing. Moreover, also confirmed by XPS results, the formation of yttrium silicates (YSiOx) was observed after 650 oC annealing, and the silicate thickness increases with the annealing temperature. It is also suggested that the interfacial layer YSiOx dominates the gate leakage current of the MOS capacitors. As a result, unlike most of the high-κ gate insulators, the gate leakage current density decreases from 4.56×10-1 A/cm2 to 3.43×10-2 A/cm2 at Vg = -2.5 V as the annealing temperature increases from 650 to 850 oC.

    第一章 緒論 1 1-1 氧化層材料二氧化矽之極限 1 1-2 高介電係數閘極氧化層 2 1-3 Y2O3薄膜的製作方法 3 1-4 論文的研究方向 3 第二章 文獻探討 4 2-1 金氧半電容 (MOS capacitor)結構介紹 4 2-2 MOS結構中氧化層缺陷之型態 7 2-2-1界面陷阱電荷 (Interface Trapped Charge, Qit) 8 2-2-2固定氧化層電荷 (Fixed Oxide Charge, Qf) 8 2-2-3氧化層陷阱電荷 (Oxide Trapped Charge, Qot) 9 2-2-4移動離子電荷 (Mobile Ionic Charge, Qm) 9 2-3傳統氧化層材料SiO2 10 2-4高介電係數氧化層材料 12 2-4-1 High-k材料La2O3 13 2-4-2 High-k材料HfO2 18 2-4-3 High-k材料ZrO2 24 2-4-4 High-k材料CeO2 30 2-4-4 Y2O3材料的特性 36 第三章 實驗方法與步驟 56 3-1 研究動機 56 3-2 氧化釔薄膜的製作 56 3-2-1矽晶圓的切割和清洗 56 3-2-2 沉積薄膜氧化釔 57 3-2-3 快速熱退火 (Rapid Thermal Annealing) 57 3-2-4 沉積鋁電極 58 3-3 實驗與量測儀器介紹 60 3-3-1實驗儀器 60 3-3-2量測儀器 62 第四章 結果與討論 71 4-1 以濺鍍法製備Y2O3薄膜之性質 71 4-1-1 X-Ray 繞射儀分析 (XRD) 71 4-1-2 X-Ray光電子能譜儀分析 (XPS) 72 4-1-3 橢圓儀與X-Ray反射率(XRR)之分析 74 4-1-4 高解析度穿透式電子顯微鏡之分析 77 4-1-5 電流-電壓(I-V)特性曲線量測 79 4-1-6 電容-電壓(C-V)特性曲線量測 80 4-1-7 Y2O3薄膜與溫度變化之漏電流傳導機制分析 82 第五章 結論與展望 87 5-1 結論 87 5-1-1 基本物性與電性 87 5-1-2 Y2O3薄膜的漏電流機制 87 5-2 未來的發展方向 88 參考文獻 89 表目錄 表2-1. 不同高介電係數材料的比較表 12 表4-1 由橢圓儀與XRR所得到的界面層厚度比較表 76 圖目錄 圖2-1. MOS電容器結構示意圖 5 圖2-2. 理想的MIS電容器能帶圖 5 圖2-3. 在不同電壓下的MIS能帶圖,(a)聚積、(b)空乏、(c)反轉 6 圖2-4. 氧化層中的電荷分佈圖 7 圖2-5.在不同氣體下進行熱處理的Dit的密度 10 圖2-6. SiO2和高介電係數材料在相同的EOT之下的J-V特性 11 圖2-6.相對於Si的導電帶之差值 13 圖2-7.閘極介電層La2O3和Al2O3/La2O3的J-V特性 14 圖2-8.閘極介電層La2O3和Al2O3/ La2O3的C-V特性 14 圖2-9. La2O3/Ge做PDA和PMA溫度為300和500 oC的C-V特性 15 圖2-10.Pt/La2O3/Ge的結構分別做PDA和PMA.之後量測到的Dit 16 圖2-11. La2O3/Ge做PDA和PMA溫度為300和500 oC的J-V特性 16 圖2-12.不同厚度下的Pt/La2O3/Ge結構做PMA之後的J-V特性 17 圖2-13.使用不同金屬閘極的La2O3/Ge結構量測到的J-V特性 17 圖2-14. (a) HfO2和(b) HfO2/SiO2薄膜的TEM圖 19 圖2-15.(a) Pd/HfO2和(b) Pd/HfO2/SiO2薄膜量測到的C-V特性 20 圖2-16.(a) Pd/HfO2和(b) Pd/HfO2/SiO2薄膜量測到的J-V特性 20 圖2-17. HfO2/Si薄膜分別做不同退火溫度下所拍攝的TEM圖 22 圖2-18. HfO2/Si薄膜分別做不同退火溫度下所分析的XPS圖 23 圖2-19. HfO2/Si薄膜分別做不同退火溫度下所量測的C-V特性 23 圖2-20. HfO2/Si薄膜分別做不同退火溫度下所量測的J-V特性 24 圖2-21. ZrO2薄膜在不同的氣體流量所分析的AFM圖 25 圖2-22. ZrO2薄膜在不同的退火溫度下量測到的XRD圖 26 圖2-23. ZrO2在退火溫度為(a)450 oC(b)750 oC所拍攝的TEM圖 26 圖2-24. ZrO2薄膜在不同的退火溫度下量測到的J-V特性 27 圖2-25.沉積時通入不同工作氣體的ZrO2薄膜所分析的XRD圖 28 圖2-26. 通入不同氣體的ZrO2薄膜所拍攝的TEM圖 28 圖2-27. 通入不同氣體的ZrO2薄膜的AFM圖 29 圖2-28 (a) Pt/CeO2/SiNxOy/Si與(b)Pt/CeO2/Si的HRTEM圖 31 圖2-29 Sample C和D是Pt/CeO2/SiNxOy/Si與Pt/CeO2/Si的C-V圖 32 圖2-30 Sample C和D是Pt/CeO2/SiNxOy/Si與Pt/CeO2/Si的I-V圖 32 圖2-31 CeO2與HfO2在不同堆疊結構下的TEM圖 34 圖2-32 CeO2薄膜沉積溫度為420 oC的TEM圖 34 圖2-33 CeO2/HfO2/Si結構的TEM圖 35 圖2-34 CeO2與HfO2在不同堆疊結構下量測到的Jg以及EOT 35 圖2-35. Y2O3薄膜拍攝出來的TEM圖(a) 低倍率、(b)高倍率 37 圖2-36. Y2O3薄膜在不同工作氣體下所拍攝的TEM圖 38 圖2-37. Y2O3薄膜在不同工作氣體下所拍攝的TEM圖 39 圖2-38. Y2O3薄膜做退火溫度為900 oC之後所拍攝的TEM圖 40 圖2-39.Y2O3反應生成SiO2後做完退火之後形成Y-silicate的示意圖 41 圖2-40.Y2O3薄膜所分析的XPS圖(a)未退火、(b)600 oC. 42 圖2-41. (a) Y/SiO2/Si的功函數和(b)在不同退火溫度下的成份分佈 43 圖2-42.在不同退火溫度下的Yttrium與SiO2/Si的XPS Si 2p比較圖 44 圖2-43. 在不同退火溫度下的Yttrium與SiO2/Si的XPS O 1s比較圖 44 圖2-44. Y2O3薄膜在不同退火溫度下的C-V特性 45 圖2-45.在不同退火溫度下的介電常數以及遲滯現象的改變量 46 圖2-46. Y2O3薄膜在不同退火溫度下的J-V特性 46 圖2-47 YAlO薄膜做XPS分析的結果(a) Al 2p and (b)Y 3d 48 圖2-48.YAlO薄膜的成份比例 48 圖2-49.不同成分比例下的YAlO薄膜的J–V特性 49 圖2-50.不同成分比例下的YAlO薄膜的介電常數 49 圖2-51 Al2O3/Y2O3/Ge 在做完500 oC退火之後所拍攝的HRTEM圖 50 圖2-52 Y2O3/ Ge做XPS所分析的結果(a) Ge 3d和 (b)Y 3d 51 圖2-53Al2O3/Y2O3/n-Ge在做完500 oC退火之後量測的C-V特性 51 圖2-54. Y2O3薄膜厚度為9 nm的C-V特性 53 圖2-55. Y2O3薄膜的J–V特性 53 圖2-56. Y2O3薄膜在不同溫度下的J–V特性 54 圖2-57. Y2O3薄膜在負偏壓下針對Schottky emission得到的結果 54 圖2-58. Y2O3在正偏壓下(a) Schottky emission與(b)P–F emission 的結果 55 圖3-1 實驗流程圖 58 圖3-2 氧化層薄膜製作流程圖 59 圖3-3 共鍍濺鍍系統 65 圖3-4 直流濺鍍系統示意圖 65 圖3-5 射頻濺鍍系統示意圖 66 圖3-6 機械幫浦示意圖 66 圖3-7 渦輪幫浦示意圖 67 圖3-8快速熱退火爐 67 圖3-9 橢圓儀 68 圖3-10 產生光電子的示意圖 68 圖3-11 X光繞射分析儀 69 圖3-12 布拉格定律示意圖 69 圖3-13 高解析穿透式電子顯微鏡示意圖 70 圖3-14 高能量電子與原子作用之示意圖 70 圖4-1 Al/Y2O3/Si 電容器在不同退火溫度的XRD繞射圖 71 圖4-2 Al/Y2O3/Si 電容器在退火溫度為850 oC的XPS分析 72 圖4-3 Al/Y2O3/Si 電容器在退火溫度為850 oC的XPS分析 73 圖4-4 Al/Y2O3/Si 電容器在退火溫度為850 oC的XPS分析 73 圖4-5 Y2O3薄膜退火溫度650 oC的XRR分析 75 圖4-6 Y2O3薄膜退火溫度650 oC的XRR分析 75 圖4-7 Y2O3薄膜退火溫度850 oC的XRR分析 76 圖4-8 Y2O3薄膜退火溫度650 oC的HRTEM圖 78 圖4-9 Y2O3薄膜退火溫度850 oC的HRTEM圖 78 圖4-10 Y2O3薄膜退火溫度為650、750、850 oC的J-V量測圖 79 圖4-11 Y2O3薄膜退火溫度為650、750和850 oC的C-V量測圖 80 圖4-12 Y2O3薄膜在不同退火溫度下的介電常數 81 圖4-13 Y2O3薄膜做完750 oC退火之後進行變溫J-V的量測圖 84 圖4-14 Y2O3薄膜做完850 oC退火之後進行變溫J-V的量測圖 84 圖4-15 750 oC的Y2O3薄膜針對ln(J/T2)與E1/2所得到的結果 85 圖4-16 750 oC的Y2O3薄膜針對ln(J/T2)與1/T作圖所得到的結果 85 圖4-17 850 oC的Y2O3薄膜針對ln(J/T2)與E1/2作圖所得到的結果 86 圖4-18 850 oC的Y2O3薄膜針對ln(J/T2)與1/T作圖所得到的結果 86

    [1] S. M. Sze and K. K. Ng, Physics of Semiconductor Devices, 3rd ed. (Wiley, New York, 2007).
    [2] B. E. Deal, Standardized terminology for oxide charges associated with thermally oxidized silicon, IEEE Electron Device Lett. 27, 606 (1980).
    [3] 劉傳璽、陳進來,“半導體元件物理與製程理論與實務”,五南文化出版社,(2006)。
    [4] B. E. Deal, M. Sklar, A. S. Grove, and E. H. Snow, Characteristics of the surface state charge (Qss) of thermally oxidized silicon, J. Electrochem. Soc. 114, 266 (1967).
    [5] G. D. Wilk, R. M. Wallace, and J. M. Anthony, High-k gate dielectrics: current status and materials properties considerations, J. Appl. Phys. 89, 5243 (2001).
    [6] J. Robertson, Electronic structure and band offsets in high-k oxide, International Workshop on Gate Insulator (IWGI), 76 (2001).
    [7] J. K. Yang, W. S. Kim, and H. H. Park, Chemical bonding states and energy band gap of SiO2 incorporated La2O3 films on n-GaAs (001), Thin Solid Films 494, 311 (2006).
    [8] L. G. Gao, K. B. Yin, Y. D. Xia, L. Chen, H. X. Guo, L. Shi, J. Yin, and Z.G. Liu, Effect of NH3 and N2 annealing on the interfacial and electrical characteristics of La2O3 films grown on fully depleted SiGe on insulator substrates, J. Phys. D: Appl. Phys. 42, 015306 (2009).
    [9] V. Capodieci, F. Wiest, T. Sulima, J. Schulze, and I. Eisele, Examination and evaluation of La2O3 as gate dielectric for sub-100 nm CMOS and DRAM technology, Microelectron. Reliab. 45, 937 (2005).
    [10] Y. H. Wu, M. Y. Yang, A. Chin, W. J. Chen, and C. M. Kwei, Electrical Characteristics of high quality La2O3 gate dielectric with equivalent oxide thickness of 5 Å, IEEE Electron Device Lett. 21, 7 (2000).
    [11] J. Song, K. Kakushima, P. Ahmet, K. Tsutsui, N. Sugii, T. Hattori, and H. Iwai, Post metallization annealing study in La2O3/Ge MOS structure, Microelectron. Eng. 86, 1638 (2009).
    [12] H. W. Chen, F. C. Chiu, C. H. Liu, S. Y. Chen, H. S. Huang, P. C. Juan, and H. L. Hwang, Interface characterization and current conduction in HfO2 gated MOS capacitors, Appl. Surf. Sci. 254, 6112 (2008).
    [13] J. Robertson, Band offsets of wide band gap oxides and implications for future electronic devices, J. Vac. Sci. Technol. B. 18, 1785 (2000).
    [14] Y. S. Lin, R. Puthenkovilakam, and J. P. Chang, Dielectric property and thermal stability of HfO2 on silicon, Appl. Phys. Lett. 81, 11 (2002).
    [15] L. Kang, B. H. Lee, W. J. Qi, Y. Jeon, R. Nieh, S. Gopalan, K. Onishi, and J. C. Lee, Electrical characteristics of highly reliable ultrathin hafnium oxide gate dielectric, IEEE Electron Device Lett. 21, 4 (2000).
    [16] J. S. Jung, J. Y. Kwon, W. Xianyu, and T. Noguchi, Study of HfO2 high-k gate oxide for low temperature poly-Si TFT, J. Korean Phys. Soc. 48, 32 (2006).
    [17] S. W. Jeong, H. J. Lee, K. S. Kim, M. T. You, Y. Roh, T. Noguchi,W. Xianyu, and J. Jung, HfO2 gate insulator formed by atomic layer deposition for thin film transistors, Thin Solid Films 515, 5109 (2007).
    [18] B. Lee, K. J. Choi, A. Hande, M. J. Kim, R. M. Wallace, J. Kim, Y.Senzaki, D. Shenai, H. Li, M. Rousseau, and J. Suydam, A novel thermally stable zirconium amidinate ALD precursor for ZrO2 thin films, Microelectron. Eng. 86, 272 (2009).
    [19] M. K. Bera, S. Chakraborty, S. Saha, D. Paramanik, S. Varma, S.Bhattacharya, and C. K. Maiti, High frequency characterization and continuum modeling of ultrathin high-k (ZrO2) gate dielectrics on strained-Si, Thin Solid Films 504, 183 (2006).
    [20] J. P. Chang and Y. S. Lin, Highly conformal ZrO2 deposition for dynamic random access memory application, J. Appl. Phys. 90, 2964 (2001).
    [21] K. Yim, Y. Park, A. Park, N. Cho, and C. Lee, Electrical properties of sputter deposited ZrO2 based Pt/ZrO2/Si capacitors, J. Mater. Sci. Technol. 22, 6 (2006).
    [22] H. S. Choi, K. S. Seol, D. Y. Kim, J. S. Kwak, C. S. Son, and I. H. Choi, Thermal treatment effects on interfacial layer formation between ZrO2 thin films and Si substrates, Vacuum 80, 310 (2005).
    [23] A. P. Huang, Z. F. Di, K. Y. Fu, and P. K. Chu, Improvement of interfacial and microstructure properties of high-k ZrO2 thin films fabricated by filtered cathodic arc deposition using nitrogen incorporation, Surf. Coat. Technol. 201, 8282 (2007).
    [24] J. Lappalainen, D. Kek, and H. L. Tuller, High carrier density CeO2 dielectrics implications for MOS devices, J. Eur. Ceram. Soc. 24, 1459 (2004).
    [25] F. C. Chiu and C. M. Lai, Optical and electrical characterizations of cerium oxide thin films, J. Phys. D: Appl. Phys. 43, 075104 (2010).
    [26] H. J. Beie, Oxygen gas sensors based on CeO2 thick and thin films, Sens. Actuators B 4, 393 (1991).
    [27] R. N. Blumenthal, F. S. Brugner, and J. E. Garnier, The electrical conductivity of CaO doped nonstoichiometric cerium dioxide from 700 oC to 1500 oC, Solid State Sci. 120, 1230 (1973).
    [28] J. Kang, K. Xun, X. Liu, R. Han, Y. Wang, D. P. Yu, G. J. Lian, G. C. Xiong, and S. C. Wu, Interfacial and structural characteristics of CeO2 films on silicon with a nitrided interface formed by nitrogen ion beam bombardment, Thin Solid Films 416, 122 (2002).
    [29] K. Karakaya, B. Barcones, Z. M. Rittersma, J. G. M. V. Berkum, M. A. Verheijen, G. Rijnders, and D. H. A. Blank, Electrical and structural characterization of PLD grown CeO2–HfO2 laminated high-k gate dielectrics, Mater. Sci. Semicond. Process. 9, 1061 (2006).
    [30] P. d. Rouffignac, J. S. Park, and R. G. Gordon, Atomic layer deposition of Y2O3 thin films from yttrium tris(N,N' diisopropylacetamidinate) and water, Chem. Mater. 17, 4808 (2005).
    [31] K. H. Kwon, C. K. Lee, J. K. Yang, S. G. Choi, H. J. Chang, H. Jeon, and H. H. Park, Effective formation of interface controlled Y2O3 thin film on Si(100) in a metal–(ferroelectric)–insulator–semiconductor structure, Microelectron. Eng. 85, 1781 (2008).
    [32] M. H. Cho, D. H. Ko, J. G. Seo, S. W. Whangbo, K. Jeong, I. W. Lyo, C. N. Whang, D. Y. Noh, and H. J. Kim, Characteristics of Y2O3 films on Si(111) grown by oxygen-ion beam-assisted deposition, Thin Solid Films 382, 288 (2001).
    [33] M. Spankova, I. Vavra, S. Chromik, S. Harasek, R. Luptak, J. Soltys, and K. Husekova, Structural properties of Y2O3 thin films grown on Si(1 0 0) and Si(1 1 1) substrates, Mater. Sci. Eng. 116, 30 (2005).
    [34] R. J. Gaboriaud, F. Pailloux, P. Guerin, and F. Paumier, Effect of surface pretreatments on interface structure during formation of ultra thin yttrium silicate dielectric films on silicon, Thin Solid Films 400, 106 (2001).

    [35] R. N. Sharma, S. T. Lakshmikumar, and A. C. Rastogi, Electrical behaviour of electron beam evaporated yttrium oxide thin films on silicon, Thin Solid Films 199, 1 (1991).
    [36] M. H. Cho, D. H. Ko, Y. G. Choi, I. W. Lyo, K. Jeong, and C. N. Whang, Effects of SiO2 overlayer at initial growth stage of epitaxial Y2O3 film growth, J. Cryst. Growth. 220, 501 (2001).
    [37] S. K. Kanga, D. H. Koa, E. H. Kim, M. H. Cho, and C. N. Whang, Interfacial reactions in the thin film Y2O3 on chemically oxidized Si(100) substrate systems, Thin Solid Films 353, 8 (1999).
    [38] F. Paumier and R. J. Gaboriaud, Interfacial reactions in Y2O3 thin films deposited on Si(100), Thin Solid Films 441, 307 (2003).
    [39] K. Nakagawa, K. Miyauchi, K. Kakushima, T. Hattori, K. Tsutsui, and H. Iwai, The effect of Y2O3 buffer layer for La2O3 gate dielectric film, Proceedings of the European Solid-State Device Research Conference (ESSDERC), 387 (2005).
    [40] Z. M. Wang, J. X. Wu, Q. Fang, and J. Y. Zhang, Photoemission study of interfacial reactions during annealing of ultrathin yttrium on SiO2/Si(1 0 0), Appl. Surf. Sci. 239, 464 (2005).
    [41] M. H. Tang, Y. C. Zhou, X. J. Zheng, Z. Yan, C. P. Chng, Z. Ye, and Z. S. Hu, Characterization of ultra-thin Y2O3 films as insulator of MFISFET structure, Trans. Nonferrous Met. Soc. China 16, 63 (2006).
    [42] K. Matsunouchi, N. Komatsu, C. Kimura, H. Aoki, and T. Sugino, Growth and properties of YAlO film synthesized by RF magnetron sputtering, Appl. Surf. Sci. 255, 5021 (2009).

    [43] L. K. Chu, W. C. Lee, M. L. Huang, Y. H. Chang, L. T. Tung, C. C. Chang, Y. J. Lee, J. Kwo, and M. Hong, Metal-oxide-semiconductor devices with molecular beam epitaxy-grown Y2O3 on Ge, J. Cryst. Growth. 311, 2195 (2009).
    [44] P. S. Das, G. K. Dalapati, D. Z. Chi, A. Biswas, and C. K. Maiti, Characterization of Y2O3 gate dielectric on n-GaAs substrates, Appl. Surf. Sci. 256, 2245 (2009).
    [45] 行政院國家科學委員會,“真空技術與應用”,儀器科技研究中心,
    (2008)。
    [46] 白木靖寬,“薄膜工程學”,全華科技圖書股份有限公司,(2006)。
    [47] 汪建民,“材料分析”,中國材料科學學會,(2001)。
    [48] 王明光、王敏昭,“實用儀器分析”,合記圖書出版社,(2003)。
    [49] L. J. Wu and J. M. Wu, Reduced leakage current and conduction mechanisms of sputtered platinum-doped lead barium zirconate thin films, J. Phys. D: Appl. Phys. 40, 4948 (2007).
    [50] S. Pan, S. J. Ding, Y. Huang, Y. J. Huang, D. W. Zhang, L. K. Wang, and R. Liu, High-temperature conduction behaviors of HfO2 /TaN-based metal-insulator-metal capacitors, J. Appl. Phys. 102, 073706 (2007).

    無法下載圖示 本全文未授權公開
    QR CODE