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研究生： 張榮堃
Chang, Rong-Kun
論文名稱： 應用於K/Ka頻段積體電路之靜電放電防護設計
On-Chip ESD Protection Design for K/Ka-Band Applications
指導教授： 林群祐
Lin, Chun-Yu
學位類別： 碩士
Master
系所名稱： 電機工程學系
Department of Electrical Engineering
論文出版年： 2015
畢業學年度： 103
語文別： 英文
論文頁數： 69
中文關鍵詞： 靜電放電耐受度 、電感 、矽控整流器
英文關鍵詞： electrostatic discharge, inductor, silicon-controlled rectifier
論文種類： 學術論文
相關次數： 點閱：126  下載：24 
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    • 本論文設計之電感嵌入矽控整流器的靜電放電防護元件可在共振的頻率之下使電路的小訊號增益損耗降低，只要選擇正確的電感感值便可以達成目標。此外，矽控整流器能在最小的面積下提供最高的靜電放電耐受度，達成較佳的電路靜電放電防護能力。

    為了驗證靜電放電防護元件在實際電路上的效能，本論文同時設計了一個低雜訊放大器電路，並且裝備本論文所提出之電感嵌入矽控整流器的靜電放電防護元件，在實驗結果比較中，本論文所提出的設計並不會降低電路的小訊號增益。

    本論文中的所有電路皆使用0.18um CMOS製程實現。透過實驗分析比較結果，本論文所提出的設計確實能夠達成良好的靜電放電防護能力，使電路能夠承受4kV的人體放電模式之靜電放電測試，證明電路能夠有效地被該元件保護。

    An inductor-assisted silicon-controlled rectifier (LASCR) electrostatic discharge (ESD) protection device was designed in this study. The signal loss under the resonant frequency can be reduced by selecting the appropriate inductor in the LASCR. Furthermore, silicon-controlled rectifier has good ESD robustness and small layout area, and let circuit achieve good ESD protection ability.

    In order to verify the protection ability of ESD protection device on the radio frequency (RF) circuit, a low-noise amplifier (LNA) circuit has been fabricated in this study, which equipped with LASCR ESD protection device. In the experimental results, the proposed design did not degrade the small-signal gain of the LNA circuit.

    All devices and circuits in this study are fabricated in 0.18um CMOS process. Through analysis and comparison of the experimental results, the proposed design can achieve a good ESD protection ability. In the experimental results, the proposed design can bear 4kV HBM test without degrade the small-signal gain of the circuit. This proves that the circuit can be effectively protected by the LASCR.

    中文摘要 I 英文摘要 II 致謝 IV 目錄 VI 表目錄 VIII 圖目錄 IX Chapter 1 Introduction 1 1.1 Motivation 1 1.2 Organization of This Dissertation 2 Chapter 2 ESD Protection Device for RF Applications 4 2.1 Introduction 4 2.2 Whole-Chip ESD Protection Design 6 2.3 CMOS ESD Protection Device for RF Circuit 8 2.3.1 ESD Protection Design with Diodes 8 2.3.2 ESD Protection Design with SCR 9 2.3.3 ESD Protection Design with Inductor-Triggered SCR 10 Chapter 3 Design of Inductor-Assisted Silicon-Controlled Rectifier 11 3.1 Introduction 11 3.2 Design of LASCR 15 3.3 Comparing Device 16 3.4 Simulation Results 17 3.5 Experimental Results of Test Devices 19 3.5.1 High-Frequency Performances 20 3.5.2 ESD Robustness 21 3.5.3 Failure Analysis 23 3.5.4 Leakage 26 3.6 Conclusion 26 Chapter 4 K/Ka-Band Low Nosie Amplifier 27 4.1 Introduction 27 4.2 Source of Transistor Noise 28 4.2.1 Channel Thermal Noise 28 4.2.2 Distributed Gate Resistance Noise 29 4.2.3 Flicker Noise 30 4.3 Parameters of Low-Noise Amplifier 31 4.3.1 Noise Figure 31 4.3.2 Gain 32 4.3.3 Stability 33 4.4 Design of K/Ka-Band Low-Noise Amplifier 33 4.4.1 Common-Source Transistor Bias and Size Analysis 35 4.4.2 Matching Network Design 39 1. Input noise matching 39 2. First stage and second stage matching 41 3. Output conjugate matching 43 4.5 Simulation Result 44 4.6 Measurement Results 47 4.7 ESD Protection Device Equipped with LNA 49 4.8 Discussion 58 4.9 Conclusion 60 Chapter 5 Conclusions and Future Works 61 5.1 Main Contributions of This Study 61 5.2 Future Works 62 參考文獻 63 自傳 68 學術成就 69

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