研究生: |
張靖 Chang, Ching |
---|---|
論文名稱: |
鐵電氧化鉿鋯於環繞式閘極電晶體(GAA)及用於疊接氮化鎵高電子遷移率電晶體(HEMT) Ferroelectric HfZrO2 for GAA-FET and GaN HEMT Cascode Application |
指導教授: | 李敏鴻 |
學位類別: |
碩士 Master |
系所名稱: |
光電工程研究所 Graduate Institute of Electro-Optical Engineering |
論文出版年: | 2020 |
畢業學年度: | 108 |
語文別: | 中文 |
論文頁數: | 53 |
中文關鍵詞: | 鰭式電晶體 、環繞式閘極電晶體 、次臨界擺幅 |
英文關鍵詞: | FinFET, GAA FET, Sub-threshold swing |
DOI URL: | http://doi.org/10.6345/NTNU202001318 |
論文種類: | 學術論文 |
相關次數: | 點閱:211 下載:0 |
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近年來隨著智慧型手機、物聯網(IoT)的發展,元件都必須具有體積小、高效能等特點,目前可以透過鰭式電晶體、環繞式閘極電晶體等多閘極電晶體,使閘極能夠有效控制元件,降低漏電流,解決元件尺寸持續微縮,所造成的短通道效應,以延續摩爾定律(Moore’s Law);5G通訊、電動車發展之下,功率元件需求大增,由於氮化鎵材料耐高溫高壓,並且具有的極高電子遷移率和寬能隙等特性相當符合功率元件使用。
本論文分為三個部分,第一部分實驗,在矽基板上堆疊二氧化矽和多晶矽用來取代 SOI 晶圓以降低成本,並以鐵電材料Hf1-xZrxO2 (HZO) 作為介電層,其中介電層分為兩種,一種為單層Hf0.5Zr0.5O2 ,另一種以2層Hf0.5Zr0.5O2 夾著Al2O3 ,應用於環繞式閘極電晶體,進行 Endurance和Retention量測。第二部分探討GaN 高電子遷移率電晶體(HEMT)的元件特性。最後一部分將鐵電電晶體與氮化鎵HEMT疊接,利用鐵電材料之負電容效應,改善次臨界擺幅(SS),並且提升臨界電壓,使氮化鎵HEMT變為增強型(E-mode),讓此疊接電路同時具備氮化鎵HEMT和鐵電電晶體之特性。
In recent years, with the development of smartphones and the Internet of Things (IoT), devices must have the characteristics of small size and high performance. The development of multi-gate transistors, such as FinFET and GAAFET, may benefit the well gate control and reduce the short-channel effect with minimizing leakage current for scaling down feature size of the device. With the development of 5G communication and electric vehicles, the demand for power devices has increased greatly. Because the gallium nitride material can withstand high voltage and high temperature, it has extremely high electron mobility and wide energy gap are quite in line with the use of power devices.
This thesis is divided into three parts: Firstly, ferroelectric Hf1-xZrxO2(HZO) as gate insulator integrated with GAAFET is performed. Stacking SiO2 and Poly-Si on the Si substrate to replace SOI wafer has an advantage of cost reduction. The measurement of endurance and retention are carried out for single and double HZO GAAFET. Then, AlGaN/GaN HEMT (high electron mobility transistors) are discussed in the second part. Finally﹐by employing a cascaded structure﹐the D-mode GaN HEMT can be combined with HZO negative capacitance Si-FET to present steep slope and normally-off characteristics.
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