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研究生: 林于惠
Lin, Yu-Hui
論文名稱: 應用於5G行動通訊之28GHz與38GHz相移器設計
Design of 28 GHz and 38 GHz Phase Shifters for Fifth Generation Wireless Communication System
指導教授: 蔡政翰
Tsai, Jen-Han
學位類別: 碩士
Master
系所名稱: 電機工程學系
Department of Electrical Engineering
論文出版年: 2019
畢業學年度: 107
語文別: 中文
論文頁數: 177
中文關鍵詞: Ka頻段相位可反向衰減器(PIVA)反射式相移器(RTPS)開關式相移器(STPS)
英文關鍵詞: Ka-band, phase-invertible variable attenuator (PIVA), reflection type phase shifter (RTPS), switch type phase shifter (STPS)
DOI URL: http://doi.org/10.6345/NTNU201900835
論文種類: 學術論文
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  • 本論文實現兩顆應用於Ka頻段的五位元相移器設計,第一顆相移器採用標準0.18-μm 1P6M互補式金屬氧化物半導體製程來實現,整體晶片面積(包含PAD)為0.94 mm × 0.57 mm,操作頻率在27 GHz至29 GHz,180°相移器使用相位可反向衰減器(PIVA)架構,90°相移器使用反射式相移器(RTPS)架構,剩餘位元皆為開關式相移器(STPS)架構。整體輸入反射係數小於 -14.13 dB、輸出反射係數小於 -5.35 dB,中心頻28GHz時,RMS振幅誤差為0.15 dB、RMS相位誤差為3.77°、直流功率消耗為0 mW。
    第二顆相移器採用標準65-nm 1P9M互補式金屬氧化物半導體製程來實現,整體晶片面積(包含PAD)為0.67 mm × 0.49 mm,操作頻率為36 GHz至40 GHz,架構與第一顆同,180°相移器使用相位可反向衰減器架構,90°相移器使用反射式相移器架構,剩餘位元皆為開關式相移器架構。整體輸入反射係數小於 -13.03 dB、輸出反射係數小於 -8.09 dB,中心頻38GHz時,RMS振幅誤差為0.82 dB、RMS相位誤差為0.83°、直流功率消耗為0 mW。

    Two Ka-band 5-bits phase shifters have been designed and presented in this thesis. The first phase shifter was fabricated on standard 0.18-μm 1P6M CMOS process and designed from 27 GHz to 29 GHz. The proposed phase shifter consists of a phase-invertible variable attenuator (PIVA), a reflection type phase shifter (RTPS), and switch type phase shifters (STPS) which provides 360° phase shifts with the resolution of 11.25°. The measured input return loss is better than 14.13 dB and the output return loss is better than 5.35 dB. The RMS amplitude error is 0.15 dB and the RMS phase error is 3.77° at 28GHz. The chip size is 0.94 mm × 0.57 mm and the dc power consumption is zero.
    The second phase shifter was fabricated on standard 65-nm 1P9M CMOS process and designed at 36 GHz to 40 GHz. The proposed phase shifter consists of a phase-invertible variable attenuator (PIVA), a reflection type phase shifter (RTPS), and switch type phase shifters (STPS) which provides 360° phase shifts with the resolution of 11.25°. The measured input return loss is better than 13.03 dB and the output return loss is better than 8.09 dB. The RMS amplitude error is 0.82 dB and the RMS phase error is 0.83° at 38GHz. The chip size is 0.67 mm × 0.49 mm and the dc power consumption is zero.

    摘 要 i ABSTRACT ii 誌 謝 iv 目 錄 v 圖 目 錄 viii 表 目 錄 xviii 第一章 緒論 1 1.1 研究背景與動機 1 1.2 文獻探討 2 1.3 研究成果 6 第二章 相移器介紹 7 2.1 簡介 7 2.2 相移器參數介紹 7 2.2.1 相位差 (Phase Difference) 7 2.2.2 插入損耗、振幅誤差 (Insertion Loss, Amp. Error) 7 2.2.3 RMS相位誤差 (RMS Phase Error) 7 2.2.4 RMS振幅誤差 (RMS Amplitude Error) 8 2.2.5 1dB增益壓縮點 ("P1dB" ) 8 2.2.6 反射係數 (Return Loss) 8 2.3 相移器電路介紹 9 2.3.1 傳輸線式相移器 9 2.3.2 開關式相移器 11 2.3.3 反射式相移器 14 2.3.4 向量合成式相移器 15 第三章 28 GHz五位元相移器設計 17 3.1 五位元相移器電路架構 17 3.2 180°相移器設計 18 3.2.1 架構探討 18 3.2.2 180°相位可反相衰減器設計 24 3.3 90°相移器設計 31 3.3.1 架構探討 31 3.3.2 90°反射式相移器設計 35 3.4 開關式T型相移器設計 42 3.4.1 理想電感與電容模擬 42 3.4.2 電晶體尺寸設計 46 3.4.3 主要位元單獨電磁模擬 52 3.5 五位元相移器模擬 57 3.6 角度預補償設計 62 3.7 28GHz五位元相移器模擬(角度補償) 65 3.8 28GHz五位元相移器量測 72 3.9 問題與討論 79 3.9.1 五位元相移器重新設計版本 79 3.10 總結 80 第四章 38 GHz五位元相移器設計 83 4.1 五位元相移器電路架構 83 4.2 180°相移器設計 84 4.2.1 架構探討 84 4.2.2 180°相位可反相衰減器設計 90 4.3 90°相移器設計 97 4.3.1 架構探討 97 4.3.2 90°反射式相移器設計 101 4.4 開關式T型相移器設計 107 4.4.1 理想電感與電容模擬 108 4.4.2 電晶體尺寸設計 112 4.4.3 主要位元單獨電磁模擬 117 4.5 五位元相移器模擬 122 4.6 角度預補償設計 127 4.7 38GHz五位元相移器模擬(角度補償) 131 4.8 38GHz五位元相移器量測 138 4.9 問題與討論 146 4.9.1 寬頻五位元相移器模擬與量測 147 4.9.2 製程變異模擬測試 155 4.10 總結 169 第五章 結論 173 參 考 文 獻 175

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