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研究生： 陳建廷
Chien-Ting Chen
論文名稱： 適用於高速菲涅耳轉換之積體電路架構設計
Efficient VLSI Architecture for Fresnel Transform
指導教授： 黃文吉
Hwang, Wen-Jyi
學位類別： 碩士
Master
系所名稱： 資訊工程學系
Department of Computer Science and Information Engineering
論文出版年： 2013
畢業學年度： 101
語文別： 中文
論文頁數： 69
中文關鍵詞： 系統晶片設計 、FPGA 、菲涅耳轉換
論文種類： 學術論文
相關次數： 點閱：186  下載：4 
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    • 本論文主要提出一硬體架構實現高速菲涅耳轉換，透過本硬體架構可還原全像片的相位值，後續再進行相位展開法則計算即可重建出物體實際樣貌。為了提高精確度，本硬體電路中大多使用IEEE 754浮點數格式進行運算，運算單元內部皆以管線化架構的方式實現，並且利用最佳排程將各運算單元之計算以平行的方式進行，有效提高菲涅耳轉換整體電路的運算效率，最後將此電路實現於FPGA開發平台並實際量測硬體資源消耗、運算時間以及功率消耗，透過硬體運算結果與軟體運算結果相互驗證確認還原結果正確。根據實驗結果，本論文提出之硬體架構有高精確度、高速運算以及低功率消耗之優點，對於現今要求即時運算的嵌入式數位全像系統，本論文所提出之硬體架構較具有競爭力。

    中文摘要............................................i 誌謝...............................................ii 目錄..............................................iii 附表目錄............................................v 附圖目錄..........................................vii 第一章 緒論.......................................1 1.1 研究背景與動機目的................................1 1.2全文架構.........................................3 第二章 基礎理論及技術背景介紹........................4 2.1 菲涅耳轉換運算流程...............................4 2.2討論菲涅耳轉換及相位展開於數位全像顯微鏡之應用.........8 2.3 FPGA系統設計...................................10 第三章 系統架構...................................13 3.1 Architecture I及Architecture II之基本架構.......13 3.1.1 前轉換單元(Pre-transform Unit)................14 3.1.2 快速傅立葉轉換單元(FFT Unit)...................18 3.1.3 後轉換單元(Post-transform Unit)...............21 3.2 Architecture I及Architecture II之排程...........29 3.2.1 Architecture I之排程.........................29 3.2.2 Architecture II之排程.........................30 3.3 軟硬體共同設計...................................31 第四章 實驗數據與效能比較...........................33 4.1 開發平台與實驗環境介紹............................33 4.2 實驗數據的呈現與討論..............................36 第五章 結論.......................................67 參考著作............................................68

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