研究生: |
鄭哲瑋 Jeng, Je-Wei |
---|---|
論文名稱: |
線性參數化伺服系統之低頻接觸力估測 Adaptive Force Estimation on Low-Frequency Contact Force for a Linearly Parameterized Servo System |
指導教授: |
呂有勝
Lu, Yu-Sheng |
學位類別: |
碩士 Master |
系所名稱: |
機電工程學系 Department of Mechatronic Engineering |
論文出版年: | 2018 |
畢業學年度: | 106 |
語文別: | 中文 |
論文頁數: | 72 |
中文關鍵詞: | 受力量測 、力量估測 、適應性法則 、壓電式力量感測器 |
英文關鍵詞: | force measurement, force estimation, adaptive algorithm, piezoelectric force sensor |
DOI URL: | http://doi.org/10.6345/THE.NTNU.DME.004.2018.E08 |
論文種類: | 學術論文 |
相關次數: | 點閱:108 下載:0 |
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本研究之目的是以一結合適應性法則之估測方式,取得線性平台上,受控體實際受力之低頻成分,以此彌補壓電式 (piezoelectric) 力量感測器低頻量測失準的現象。相較傳受力量取方式,本研究所提出之估測方法特點在於:藉由適應法則,估出當下系統之干擾,並進一步將受控體實際所受之力量大小估測出來。
量測受力方面,使用應變規 (strain gauge) 形式的荷重元 (load cell) 力量感測器,用作實際受力之參考基準值;估測方面,則使用壓電式力量感測器提供受力值給估測律,來準確估出包含低頻部分之當下受力。
實驗平台方面,包含一線性伺服馬達系統,並採用美國德州儀器公司(Texas Instruments, TI)生產之TMS320C6713 DSP開發板,搭配實驗室成員所自行研發,具備FPGA等IC之擴充子板,作為控制核心。於FPGA方面,以VHSIC (Very High Speed Integrated Circuit) 硬體描述語言(VHDL)撰寫編碼器、ADC與DAC等週邊界面訊息處理函式;而在控制法則實現上,透過TI提供的Code Composer Studio (CCS)發展環境,以C/C++撰寫控制器程式並下載到DSP上執行。藉由實驗室成員自行設計、組裝之一維線性實驗平台進行受力與其它數值量取。其結果顯示,本研究提出之方法能有效改善壓電式感測器低頻量測失準現象,及估出系統的不確定性。
This research presents an adaptive algorithm for estimating an external force acting on a linear motion stage. The lower-frequency part of estimated force is then used to compensate force from piezoelectric quartz sensor, which is unable to measure low-frequency components of an external force. Compared to traditional force measuring method, this research provides an adaptive algorithm for estimating disturbance of system, and use it to estimate the real contact force.
In this paper, a strain-gage load cell is employed to measure an external force as a reference, and a piezoelectric quartz force sensor provides force data for an adaptive algorithm which can estimate force precisely, including low-frequency range.
The experimental system consists of a linear servomotor system, and a TMS320C6713 DSP (Digital Signal Processor) from Texas Instruments is used with a self-developed FPGA (Field-Programmable Gate Array) daughter board, as the control kernel. ADC, DAC and other interface are realized on FPGA by employing VHSIC (Very High Speed Integrated Circuit) hardware description language (VHDL), and control algorithm is realized on DSP by employing the C/C++ language under CCS (Code Composer Studio) developing environment. Force and other data is gathering from a one-dimensional linear platform designed and assembled by lab members. The experimental results show that the proposed scheme improves the accuracy of the quartz force sensor in terms of lower-frequency contact force, and also estimates the uncertainty of the system.
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