研究生: |
葉朝裕 |
---|---|
論文名稱: |
個人電腦配合FPGA/CPLD作計算機結構教學課程之研究 Teaching Computer Architecture Course Using PC and FPGA/CPLD |
指導教授: |
張吉正
Chang, Chi-Jeng 蕭培墉 Hsiao, Pei-Yung |
學位類別: |
碩士 Master |
系所名稱: |
工業教育學系 Department of Industrial Education |
畢業學年度: | 86 |
語文別: | 中文 |
論文頁數: | 85 |
中文關鍵詞: | 計算機 、電腦輔助設計工具 、PLD 、FPGA 、CPLD |
英文關鍵詞: | computer, computer aided design |
論文種類: | 學術論文 |
相關次數: | 點閱:212 下載:0 |
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本論文係計算機結構課程結合PLD電腦輔助設計工具,在教學上
之應用研究。計算機課程在以往的學習,都是以傳統的教學方式進
行,教師將單一主題以講述法由淺入深,教導學生理論和設計方法,
並以電路實習增加學生的實際電路製作和設計經驗,但是在缺少有
效的設計方法以及使用麵包板插接線路的功能測試,耗時又容易出
錯等問題的影響,學習成效往往不如預期的好。
因此,本論文使用PLD電腦輔助設計工具,以其所提供完整的設
計環境,提出實際電路設計教學策略,實際進行簡易計算機系統之
設計,最後將電路燒錄到晶片做測試,整個設計過程都在電腦上完
成,設計者可將大部份時間花費在創作和思考上,避免複雜的線路
板插接所產生的人為錯誤。
This thesis is relative to the research on teaching by combining computer structure course with PLD computer aided design (CAD) tools. In the past, the traditional mode was frequently adopted in the computer class. For one subject, the teacher explained the profound in simple terms by teaching theory and designing method. Meanwhile, circuit laboratory was also arranged in order to increase students' practical experience in circuit production as well as design. However, the learning effects were not often so good as expected, because the lack of efficient designing method and the test of breadboard spent lots of time and easily caused mistakes.
This thesis uses PLD computer aided design (CAD) tools. With its complete design environment, the study try suggesting a practical teaching strategy in the circuit design, carry out design of a simple computer. Finally, the circuit is copied to the chip for testing purpose. The whole design process is completed on the computer, so the designer may spend most of his labor and time on creation and thinking, to avoid the complicated circuit board building.