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研究生: 陳世耀
Chen, Shih-Yao
論文名稱: 一種用於氧化鎵微結構陣列切割的非等能量雙電阻電容放電電源研製
Development of a dual-resistance-capacitance discharge power source with non-equal energy applied to β-Ga2O3 microstructure array cutting
指導教授: 陳順同
Chen, Shun-Tong
口試委員: 趙崇禮 蔡俊毅 蘇崇彥 陳順同
口試日期: 2021/08/12
學位類別: 碩士
Master
系所名稱: 機電工程學系
Department of Mechatronic Engineering
論文出版年: 2021
畢業學年度: 109
語文別: 中文
論文頁數: 157
中文關鍵詞: 非等能量雙電阻電容放電電源氧化鎵熱裂解寬能隙
英文關鍵詞: Dual-resistance-capacitance discharge power source with non-equal energy, gallium oxide, pyrolysis, wide-bandgap
研究方法: 實驗設計法
DOI URL: http://doi.org/10.6345/NTNU202101239
論文種類: 學術論文
相關次數: 點閱:77下載:0
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  • 本研究旨在開發一種「非等能量雙電阻電容放電電源」,並應用於氧化鎵高深寬比微細結構陣列的加工研究。氧化鎵係由氧原子與鎵原子化合而成的寬能隙半導體材料,廣用於高功率元件,具高硬度與高脆性,不易切削加工,目前多以蝕刻方式成形,但蝕刻速度慢,且不易成形高深寬比結構。寬帶隙材料可降低能耗,降低能耗不僅減少了功率損耗,且可使系統微小化,與矽的解決方案相比,降低了成本。不過,常溫狀態下,材料能隙愈大,絕緣性愈高,因此本研究以歐姆接觸原理,於氧化鎵表面製作導電電極,使其呈現微弱導電特性。因此,透由高頻火花熔蝕,將材料中的氧移除,鎵便能從材料中快速剝落,氧化鎵微結構即可被快速成形。所以本研究提出一種「非等能量雙電阻電容放電電源」的電路設計。「非等能量雙電阻電容放電電源」由「元件可程式邏輯閘陣列(FPGA)」控制放電迴路的等頻率放電時間,並以100 pF/200 pF的雙電容當迴路放電電容,以便創造出高頻、高低峰及短脈衝的放電電流波列。高峰值電流負責汽化、熔蝕及移除氧化鎵材料,低峰值電流負責移除氧化鎵的放電殘渣及熔蝕毛邊,並提供介電液將放電殘渣沖離的放電休止時間。實驗結果顯示,就放電加工而言,比較起鋁合金,氧化鎵有更高的材料移除率,主要原因為氧化鎵在放電高溫作用下,會發生熱裂解(Pyrolysis),當氧被去除後,材料會以小塊狀模式剝落,可加速材料移除。且在設計的「非等能量雙電阻電容放電電源」作用下,可成功切割出柱狀微結構陣列及片狀曲面微結構,且微細結構陣列皆能成形平滑曲面結構,槽寬與表面粗糙度值分別可達24.5 µm與Ra0.188 µm,特徵形狀具高一致性,毛邊與邊緣崩落量都很少;相較於蝕刻技術,不但速度快,更可達高深寬比,加工效率明顯提升,證實「非等能量雙電阻電容放電電源」適用於寬能隙材料的加工,期望此項技術未來能應用於光電產業。

    The aim of the study is to develop a "dual-resistance-capacitance discharge power source with non-equal energy" for cutting β-Ga2O3 with high-aspect-ratio microstructure array. Gallium oxide which is made of the combination of oxygen atoms and gallium atoms is a wide band gap semiconductor material and widely used in high-power devices. It is characterized by high- hardness, brittleness and not easy to cut. At present, the etching method is mostly used for forming, however, the etching speed is slow, and it is difficult to foFrm a microstructure with high aspect ratio. The wide-bandgap materials allow reduced energy consumption. Reducing energy consumption not only reduces power loss but also makes the system miniaturized, reducing costs compared with silicon solutions. Nevertheless, the greater the energy gap of the material, the higher the insulation under normal temperature condition. An ohmic contact method, in which conductive electrodes are fabricated on the surface of gallium oxide, is carried out to make it possesses weak conductive properties. Therefore, by removing oxygen from the material by high-frequency spark ablation, gallium can be spontaneously and quickly peeled off from the matrix, and the gallium oxide microstructure can be rapidly formed. In view of this, a circuit design of "dual-resistance-capacitance discharge power source with non-equal energy" is proposed in this study. The equal frequency discharge time is controlled by the "component programmable logic gate array (FPGA)" in the power source. Experimental results found that a dual-capacitor with 100pF/200pF used can create a discharge current with high-frequency, high-low-peak and short-pulse train, which is very suitable for cutting the gallium oxide microstructure. High-peak current dominates vaporization, ablation and removal of gallium oxide material, while low-peak current is responsible for removing discharge debris and ablation burrs of gallium oxide. In addition, the pulse off-time of discharge is also designed to be adjustable so that the discharge debris has enough time to be flushed away by dielectric fluid. Experimental results show that in terms of electrical discharge machining, gallium oxide has a higher material removal rate than aluminum alloy. The main reason is that gallium oxide will undergo thermal cracking (i.e. pyrolysis). The gallium oxide will peel off in a small block pattern when oxygen is removed, thereby speeding up the removal of the material. Moreover, by applying the designed "dual-resistance-capacitance discharge power source with non-equal energy", the microstructure arrays with pillar and sheet-like curved can be successfully produced. These microstructure arrays are formed with smooth surface, the slot-widths and surface roughness can reach up to 24.5 µm and Ra0.188 µm, respectively. The microstructure features with high-consistency and low the amount of edge-burrs are realized successfully. Compared with the etching technology, it is not only faster but also achieves a microstructure with high aspect ratio, improving significantly the processing efficiency, proving that the "dual-resistance-capacitance discharge power source with non-equal energy" is suitable for cutting the materials with wide-bandgap. It is expected that this technology can be applied to optoelectronics industry in the future.

    摘要 i Abstract ii 誌謝 iii 目錄 iv 表目錄 viii 圖目錄 x 符號說明 xix 第一章 序論 1 1.1前言 1 1.2文獻回顧 2 1.2.1放電電源之相關文獻 2 1.2.2放電加工技術相關文獻探討 7 1.2.3氧化鎵應用相關文獻探討 12 1.3研究動機 17 1.4研究目的 19 1.5 研究方法 21 第二章 實驗原理 23 2.1放電加工現象與原理 23 2.2精微放電加工原理 24 2.2.1放電加工參數 24 2.2.2放電加工常用電源 26 2.3 金屬氧化物半導體場效電晶體(MOSFET)切換原理 28 2.3.1金氧半場效電晶體(MOSFET)之切換特性 28 2.3.2金屬氧化物半導體場效電晶體(MOSFET)的缺陷 30 2.4氧化鎵材料特性 30 2.4.1氧化鎵結構與性質 30 2.4.2氧化鎵晶體生長方式 31 2.4.3摻雜錫的氧化鎵之電子特性 32 2.5歐姆接觸原理與製程 33 2.5.1金屬與半導體接觸特性 34 2.5.2氧化鎵金屬薄膜沉積 36 第三章 實驗設備與材料 39 3.1製造設備與實驗設備 39 3.1.1 CNC立式綜合加工機 39 3.1.2 CNC線切割放電加工機 39 3.1.3精微放電線切割加工機 40 3.1.4電子束蒸鍍系統 41 3.1.5快速升溫退火爐 42 3.1.6微型直流馬達 43 3.1.7元件可程式邏輯閘陣列(FPGA) 43 3.1.8直流電源供應器 44 3.2量測設備 45 3.2.1混合訊號示波器 45 3.2.2工具顯微鏡(OM) 46 3.2.3線上CCD攝影機 46 3.2.4掃描式電子顯微鏡 47 3.2.5雷射共軛焦顯微鏡 48 3.2.6半導體參數分析儀 48 3.3實驗材料選用 49 3.3.1微細銅線 49 3.3.2氧化鎵基板 50 3.3.3 鋁合金 50 第四章 實驗設計與方法 52 4.1非等能量雙電阻電容放電電源 52 4.1.1非等能量雙電阻電容放電電源之電路設計 53 4.1.2非等能量雙電阻電容放電電源的電路實現與工作狀態 59 4.1.3控制訊號模型與輸出訊號檢測 62 4.1.4高頻訊號控制非等能量雙電阻電容放電電源輸出測試 65 4.2氧化鎵導電改質 71 4.2.1氧化鎵導電改質製程 72 4.2.2氧化鎵I-V特性量測 74 第五章 非等能量雙電阻電容放電電源的放電實驗 76 5.1非等能量雙RC微線切割放電實驗建構 76 5.2非等能量雙電阻電容放電電源加工參數定義 77 5.3等能量高頻放電模式之氧化鎵放電實驗 80 5.3.1不同放電電容對氧化鎵放電加工測試 81 5.3.2不同放電頻率對氧化鎵槽寬比較 87 5.3.3不同進給速度氧化鎵槽寬比較 93 5.3.4氧化鎵材料放電移除機制探討 96 5.4非等能量高頻放電模式對不同材料性質之放電實驗 97 5.4.1非等能量高頻放電對氧化鎵材料放電實驗 99 5.4.2非等能量與等能量高頻放電對氧化鎵放電邊緣比較 104 5.4.3非等能量高頻放電對鋁合金材料放電實驗 107 5.4.4非等能量與等能量高頻放電對鋁合金放電邊緣比較 114 5.5非等能量高頻放電模式對不同材料的放電加工特性探討 117 5.5.1 氧化鎵與鋁合金放電加工能力比較 117 5.5.2 氧化鎵與鋁合金放電加工之放電波形比較 119 第六章 氧化鎵微結構加工驗證 124 6.1 氧化鎵的放電間隙補償與氧化鎵微結構設計 124 6.2 放電熱對氧化鎵微結構的影響 126 6.2.1放電熱對氧化鎵微結構不同厚度之影響 126 6.2.2放電熱對氧化鎵表面變質層之影響 130 6.3 氧化鎵的放電加工之表面粗糙度影響 132 6.4 微結構加工成形與討論 137 6.4.1曲線形陣列結構加工與討論 137 6.4.2陣列柱狀結構加工與討論 142 第七章 結論與研究成果 144 7.1 結論 144 7.2 研究成果 145 7.3 研究貢獻 146 7.4未來展望 147 參考文獻 148

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