簡易檢索 / 詳目顯示

研究生: 戴志偉
Chih-Wei Tai
論文名稱: 非晶矽、微晶矽之應力分析於太陽能電池與薄膜電晶體應用
Mechanical Stress Analysis of Amorphous and Microcrystalline Silicon in Solar Cells and Thin Film Transistors Applications
指導教授: 李敏鴻
Lee, Min-Hung
學位類別: 碩士
Master
系所名稱: 光電工程研究所
Graduate Institute of Electro-Optical Engineering
論文出版年: 2010
畢業學年度: 99
語文別: 中文
論文頁數: 108
中文關鍵詞: 應力行為異質接面非晶矽微晶矽
英文關鍵詞: Mechanical Stress, Heterojunction, Amorphous Silicon, Microcrystalline Silicon
論文種類: 學術論文
相關次數: 點閱:117下載:0
分享至:
查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報
  • 內容屬機密不公開

    內容屬機密不公開

    總目錄 第 一 章 、 緒 論 … … … … … … … … … … … … … … … … … . 1 1.1 非晶矽、微晶矽材料分 …………………………………………….1 1.1.1 非晶矽材料分析 …………………………………………….1 1.1.2 微晶矽材料分析 …………………………………………….2 1.2 非晶矽與微晶矽材料之應用 ……………………………………...3 1.2.1 異質接面太陽能電池 ……………………………………….3 1.2.2 可撓曲薄膜電晶體 ………………………………………….5 第二章、異質接面矽基太陽能電池原理與製作 ……………………..7 2.1 異質接面矽基太陽能電池簡介 …………………………………...7 2.2 異質接面矽基太陽能電池(HIT)設計原理 ……………………….10 2.2.1 傳統的異質接面太陽能電池(p+ a-Si/n type c-Si) ………...10 2.2.2 新型態異質接面太陽能電池原理 ………………………...11 2.2.3 表面粗糙化處理(textured) …………………………………13 2.2.4 背面電場(back surface filed BSF) ………………………….14 2.2.5 透明導電膜(transparent conductive oxide TCO) …………...16 2.2.6 原理總結 …………………………………………………...16 2-3 異質接面矽基(HIT)製程 ………………………………………...17 2.3.1 背面電場(BSF)效應之討論 ……………………………….20 2.3.2 不同沉積溫度、化學氧化物保護層與有無氫氣鈍化 ……21 2.3.3 不同矽晶圓品質與有無粗糙化之討論 …………………...23 2.3.4 結論 效率 13.82%異質接面太陽能電池 …………………26 第三章、模擬異質接面太陽能電池在應力下的特性 ………………27 3.1 構想背景與簡介 ………………………………………………….27 3-2 實驗設計 ………………………………………………………….28 3.3 異質接面太陽能電池模擬參數設定 …………………………….29 3.3.1 氫化非晶矽材料設定 ……………………………………...29 3.3.2 異質接面太陽能電池材料物理參數設定 ………………...32 3.4 實驗流程步驟 ……………………………………………………33 3.4.1 模擬 Sanyo 異質接面結構確定模型正確 …………………33 3.4.2 ANSYS 模擬各吸收層厚度在應力下的分佈 ………………34 3.4.3 計算形變量與能帶關係 ……………………………………36 3.4.4 太陽能電池在應力下的電性表現 …………………………36 3.5 結論 ……………………………………………………………….38 第四章、微晶矽薄膜電晶體機械與電的可靠度 …………………….39 4.1 研究背景簡介 …………………………………………………….39 4.2 微晶矽薄膜電晶體 ……………………………………………….41 4.3 下閘極微晶矽與非晶矽薄膜電晶體電性比較 ………………….42 4.3.1 下閘極微晶矽與非晶矽薄膜電晶體結構 ………………...42 4.3.2 HC 下閘極微晶矽與非晶矽薄膜電晶體電性表現 ……….43 4.3.3 PBTI 下閘極微晶矽與非晶矽薄膜電晶體電性表現 ……..45 4.3.4 DOS 解釋 Stress 後的現象 ………………………………..46 4.3.5 HC (hot carrier)與 PBTI (positive-bias temperature instability) 操作機制 ………………………………………………………………47 4.3.6 非晶矽與微晶矽在 HC、PBTI stress 物理特性整理 …….48 4.3.7 非晶矽與微晶矽下閘極薄膜電晶體穩定性結論 ………...50 4.4 上閘極微晶矽薄膜電晶體電與力可靠度分析 ………………….51 4.4.1 計畫流程 …………………………………………………...51 4.4.2 上閘極微晶矽薄膜電晶體製程 …………………………...53 4.4.3 討論通道長度與玻璃基板取下的電性 …………………..54 4.5 利用應力模擬討論微晶矽薄膜變晶體在應力的情況 ………….55 4.5.1 增加無內應力的 SiN 薄層 ………………………………..55 4.5.2 模擬改變彎曲曲率 ………………………………………..56 4.5.3 改變微晶矽的內應力 ……………………………………..57 4.5.4 改變微晶矽的楊氏係數 …………………………………..58 4.5.5 改變氮化矽的內應力 ……………………………………..59 4.5.6 改變氮化矽的楊氏系數 …………………………………..60 4.5.7 整理介面層的應力分佈 …………………………………..62 4.5.8 改變基板種類(PI、PET、Cu、Steel)的應力分布 ……….63 4.6 上閘極微晶矽薄膜電晶體機械應力分析 ………………………65 4.6.1 垂直與帄行通道應力電性分析 …………………………..65 4.6.2 垂直與帄行通道多次撓曲應力電性分析 ………………..66 4.6.3 上閘極微晶矽薄膜電晶體張應力多次撓曲電性分析 …...68 4.6.4 上閘極微晶矽薄膜電晶體壓應力多次撓曲電性分析 …...70 4.6.5 上閘極微晶矽薄膜電晶體在多次撓曲下可靠度分析 …...72 4.6.6 模擬多次撓曲下元件劣化機制 …………………………..74 4.7 上閘極微晶矽電晶體應力下 DC、AC 電流操作可靠度分析 ..77 4.8 結論 ………………………………………………………………79 第五章、總結與未來工作 ……………………………………………80 5.1 結論 ……………………………………………………………….80 5.1.1 異質接面太陽能 …………………………………………...80 5.1.2 微晶矽薄膜電晶體 ………………………………………...80 5.2 未來工作 ………………………………………………………….81 5.2.1 異質接面太陽能 …………………………………………...81 5.2.2 微晶矽薄膜電晶體 ………………………………………...82

    [1] R.W. Collins, et al., “Application of deposition phase diagrams for the optimisation of a-Si:H-based materi-als and solar cells” Mat. Res. Soc. Symp. Proc. 762, A10.1.1–A10.1.12 2003.
    [2] 李海崧 “太陽能電池系統介紹” Sunshine & Greenland陽光綠地, 2009
    [3] A. Kolodziej “Staebler-Wronski effect in amphous silicon and its alloys” Opto-Electronics Review Vol.12, pp.21–32 2004
    [4] Chen-Wei Lin, et al., “A Novel Pixel Design for AM-OLED Displays Using Nanocrystalline Silicon TFTs” IEEE Transactions on Very Large Integration Systems (VLSI) , Vol.19, NO.6 2011
    [5] M. Mizukami, et al., “Flexible AM OLED Panel Driven by Bottom-Contact OTFTs” IEEE Electron Device Lett., Vol.27, pp.249-251 2006
    [6] K. Long, et al., “Stability of Amorphous-Silicon TFTs Deposited on Clear Plastic Substrates at 250 C to 280 C” IEEE Electron Device Lett., Vol.27, pp.111-113 2006
    [7] H. Gleskova, et al., “Electrical response of amorphous silicon thin-film transistors under mechanical strain” Journal of Applied Physics, Vol.92, pp.6224-6229 2002
    [8] H. Gleskova, et al., “Failure resistance of amorphous silicon transistors under extreme in-plane strain ” Journal of Applied Physics, Vol.75, pp.3011-3013 1999
    [9] http://www.matweb.com, 24/06/2011
    [10] Yasufumi Tsunomura, et al., “Twenty-two percent efficiency HIT solar cell” Solar Energy Materials & Solar Cells Vol.93, pp.607-673 2009
    [11] M.R. Page , et al., “Amorphous/crystalline silicon heterojunction solar cells with varying i-layer thickness” Vol.519, pp. 4527-4530 2011
    [12] Mikio Taguchi, et al., “Obtaining a Higher Voc in HIT Cells” Progress in Photovoltaics Research and Applcations Vol.13, pp.481–488 2005
    [13]http://www.eettaiwan.com/ART_8800423831_675763_TA_92a2732f.HTM 2006
    [14] J. J. Huang, et al., SID. San Antonio, p.866-869. 2006
    [15] 陳志强 “可撓曲的面板-塑膠基板顯示器” 工業材料雜誌 188期
    [16] 雷永泉、萬群與石永康, “新能源材料” 新文京出版社, pp.296-299 2004
    [17] “Solar generation V-2008/Solar electricity for over one billion people and two million jobs by 2020” EPIA, Sep. 2008
    [18] Daisuke Ide, et al., “Excellent power-generating properties by using the HIT structure.” Photovoltaic Specialists Conference, pp.1-5 2008
    [19] Makoto Tanaka, et al., “Development of New a-Si/c-Si Heterojunction Solar Cells:ACJ-HIT(Artificially Constructed Junction Heterojunction with Intrinsic Thin-Layer)” J. Appl.Phys. Vol.31, pp. 3518-3522 1992
    [20] PV Education.org http://pveducation.org/pvcdrom/design/surface-texturing
    [21] Dale, B., et al., "High efficiency silicon solar cells", Proceedings of the 14th Annual Power Sources Conference: U.S. Army Signal Research and Development Lab, pp.22 1960.
    [22] Bailey, et al., “Texture etching of silicon: method”, United States Patent: 4137123 1979.
    [23] K. Wakisaka, et al., ”More than 16% Solar cells with a new “HIT” (doped a-Si/non-doped a-Si/crystalline Si) structure ” Photovoltaic Specialists Conference, pp.887-892 1991
    [24] I. Gordon, et al., ”8% Efficient Thin-Film Polycrystalline-Silicon Solar Cells Based on Aluminum-Induced Crystallization and Thermal CVD” Prog. Photovolt: Res. Appl.Vol.15, pp.575–586 2007

    [25] Toru Sawada, et al., “High-Efficiency a-Si/c-Si Heterojunction Solar cell” First WCPEC pp.1219-1226 1994
    [26] Mitsuyuki Yamanaka, et al., “Low temperature Back-Surface-Field (BSF) technology for crystalline silicon (c-Si) thin film solar cells based on heterojunction between silicon and c-Si ” Photovoltaic Energy Conversion, Vol.2, pp.1421-1424 2006
    [27] Eiji Maruyama, et al., “Sanyo’s Challenges to the Development of High-efficiency HIT Solar Cells and the Expansion of HIT Business” Photovoltaic Energy Conversion Vol.2, pp.1455-1460 2006
    [28] Madhumita Nath, et al., ”Criteria for improved open-circuit voltage in a‐Si:H(N)/c‐Si(P) front heterojunction with intrinsic thin layer solar cells” American Institute of Physics Vol.103, 034506-1 2008
    [29] Taguchi, M., et al., “An approach for the higher efficiency in the HIT cells” Photovoltaic Specialists Conference pp.866-870 2005
    [30] PV Education.org http://pveducation.org/pvcdrom/solar-cell-operation/effect-of-temperature
    [31] Hitoshi Sakata, et al., “20.7% Highest efficiency large area (100.5cm2) HITTM cell” Photovoltaic Specialists Conference pp.7-12 2000
    [32] Hiroyuki Fujiwara, et al., “Optimization of interface structures in crystalline silicon heterojunction solar cells” Solar Energy Materials & Solar Cells Vol.93, pp.725–728 2009
    [33] Hiroyuki Fujiwara, et al., “Application of hydrogenated amorphous silicon oxide layers to c-Si heterojunction solar cells” Applied Physics Letters Vol.91, 133508 2007

    [34] Alexander Ulyashin, et al., “Minority currier lifetime improvenment in P-type silicon by oxygen related centers getteung at low temperatures application to the heterojunction solar cell processing” World Conference on Photovoltaic Energy Conversion pp.1088-1091 2003
    [35] Emanuele Centurioni et al., “Role of Front Contact Work Function on Amorphous Silicon/Crystalline Silicon Heterojunction Solar Cell Performance” IEEE ELECTRON DEVICE LETTERS, Vol. 24, NO.3 2003
    [36] Jesús A. del Alamo et al., “Modelling of minority-carrier transport in heavily doped silicon emitters ” Solid State Electron. Vol.30, pp.1127-1136 1987
    [37] 林明獻, “太陽能電池技術入門”全華出版社, chaper. pp.1-4, 2008
    [38] Yue Kuo “THIN FILM TRANSISTORS Materials and Process” Kluwer Academic pp.18-20 2004
    [39] J. J. Wesler, Ph. D. thesis, Stanford University , 1996
    [40] M. H. Lee, et al., “Comprehensive Low-Frequency and RF Noise Characteristics in Strained-Si NMOSFETs”, International Electron Device Meeting (IEDM) pp.69-72 2003.
    [41] Martin Green, Solar cells Operating Principles, technology and System Applications, University of New South Wales, February pp.86-88 1992
    [42] http://upload.wikimedia.org/wikipedia/commons/3/3a/Tftcircuit.jpg
    [43] http://commons.wikimedia.org/wiki/File:OLED-Pixel.2T1C_(P-TFT).svg
    [44] 葉永輝 新電子201期12月號 2006。
    [45] R. A. Street “Technology and Application of Hydrogenated Amorphous Silicon.” New York: Springer Verlag, 2000.

    [46] M. J. Williams, et al., “A comparative study of the light-induced defects in intrinsic amorphous and microcrystalline silicon deposited by remote plasma enhanced chemical vapor deposition”AIP Conf. Proc. Vol.234, pp.211-217 1991
    [47] R. Fluckiger, et al., ”Electrical properties and degradation kinetics of compensated hydrogenated microcrystalline silicon deposited by very high‐frequency‐glow discharge” J. Appl. Phys. Vol.77, pp.712 1995.
    [48] 戴亞翔 “TFT-LCD 面板的驅動與設計”五南圖書 pp.345-346 2008。
    [49] M. J. Powell “The physics of amorphous-silicon thin-film transistors”IEEE Trans. Electron Devices, vol. 36 no. 12 pp. 2753–2763, 1989.
    [50] Corinne Droz, et al., ”Electrical and Microstructural Characterisation Microcrystalline Silicon Layers and Solar Cells” 3rd World Conference on Photovoltaic Energy Conversion. Paper 5O-A3-01 Osaka. Japan. 2003
    [51] Jin He, et al., “A physics-based analytic solution to the MOSFET surface potential from accumulation to strong-inversion region” IEEE Trans on Electron Device Vol.53, pp.2008-2016 2006.
    [52] Gregory Choong, et al., “High mobility bottom gate microcrystalline silicon TFT deposited by VHF PECVD” the Proceedings of the 5th International TFT Conference 3.3 2009
    [53] Hsiang-na Liu et al., “The Staebler-Wronski effect in microcrystalline silicon films ” Solid State Comm., Vol.58, pp.601-603 1986
    [54] Kah-Yoong Chan, et al., “High-mobility microcrystalline silicon thin-film transistors prepared near the transition to amorphous growth” Journal of Applied Physics Vol.104, 054506 2008

    [55] Bui, et al., ”Microcrystalline Silicon TFTs for Active Matrix Displays" SID
    Symposium Digest of Technical Papers Vol.37, pp.204 2006
    [56] http://www.matweb.com, 24/06/2011
    [57] A. L. Del Vecchio et al., “The effect of deposition rate on the intrinsic stress in copper and silver thin films ” Journal of applied physics Vol.101, 063518,2007
    [58] George E. Totten , ” Handbook of residual stress and deformation of steel ” , ASM International, 01/03/2001
    [59] http://www.landon.com.tw/blog/index.php, 24/06/2011
    [60] Ryo Hayashi et al., “Improved Amorphous In-Ga-Zn-O TFTs” SID DIGEST pp.621-624 2008
    [61] Je-hun Lee et al., “World’s Largest (15-inch) XGA AMLCD Panel Using IGZO Oxide TFT” SID DIGEST pp.625-628 2008

    無法下載圖示 本全文未授權公開
    QR CODE