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研究生： 黃威智
Wen-Jihi Hwang
論文名稱： 在可程式化系統晶片中實現網路入侵偵測系統之高效能封包分類與比對電路
指導教授： 黃文吉
Hwang, Wen-Jyi
學位類別： 碩士
Master
系所名稱： 資訊工程學系
Department of Computer Science and Information Engineering
論文出版年： 2007
畢業學年度： 95
語文別： 中文
論文頁數： 74
中文關鍵詞： FPGA實作 、網路入侵偵測系統 、低硬體資源消耗 、高效率
英文關鍵詞： FPGA implementation, Network intrusion detection system, lowarea cost, High throughput
論文種類： 學術論文
相關次數： 點閱：129  下載：1 
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    • 本論文中所呈現的是在FPGA上實現一個非常有效率的header classification circuit，並且能夠運用於網路入侵偵測系統。Header classification circuit利用一些簡單的shift register與symbol encoder，即可以達到快速且精確的封包檔頭比對。並且與其他現有的電路做比較之後，顯示我們所設計的電路，運用於網路入侵偵測系統並且實作在FPGA上，可以符合高效率與低硬體資源消耗。

    An efficient FPGA-based header classification circuit is proposed for network intrusion detection system (NIDS). The circuit is based on simple shift registers and symbol encoders for the fast packet header classification in hardware. As compared with related work, experimental results show that the proposed work achieves higher throughput and less hardware resource in the FPGA implementations of NIDS systems.

    附圖目錄..................................................vii 附表目錄...................................................xi 第一章 緒論...............................................1 1.1 研究背景...........................................1 1.2 研究動機............................................7 1.3 研究目的............................................8 1.4 全文架構............................................9 第二章 理論背景與基礎電路架構介紹............................10 2.1 理論背景...........................................10 2.1.1 Regular Expression................................10 2.1.2 Content Addressable Memory(CAM) ..................12 2.1.3 Ternary Content Addressable Memory(CAM) ..........14 2.1.4 Shift-or Algorithm................................16 2.2 基礎電路架構介紹....................................19 2.2.1 ROM-based Architecture............................19 2.2.2 Shift-or circuit based on symbol encoder..........24 第三章 高效能封包分類與比對電路..............................29 3.1 簡介..............................................29 3.2 基本電路...........................................30 3.3 高效能電路.........................................35 第四章 實驗數據與效能比較...................................46 4.1 開發平台與測試環境.................................46 4.2 測試結果與討論....................................49 第五章 結論.......................................61 參考著作..................................................62

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