研究生: |
林建成 |
---|---|
論文名稱: |
指紋前處理與編碼之可撓性與可擴充性VLSI架構設計 |
指導教授: |
張吉正
Chang, Chi-Jeng 蕭培墉 Hsiao, Pei-Yung |
學位類別: |
碩士 Master |
系所名稱: |
工業教育學系 Department of Industrial Education |
論文出版年: | 2002 |
畢業學年度: | 90 |
語文別: | 中文 |
論文頁數: | 60 |
中文關鍵詞: | 指紋辨識 、影像前處理 、特徵編碼 、VLSI晶片設計 |
論文種類: | 學術論文 |
相關次數: | 點閱:187 下載:19 |
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指紋影像前處理、指紋特徵編碼(或稱萃取)及指紋比對為指紋辨識中的三大部份,其中指紋前處理與指紋特徵編碼佔整個指紋辨識約90%的時間。本論文提出一同時適用於部份指紋前處理(preprocessing)與編碼(encoding)功能的可撓性(flexible)與可擴充性(scalable)VLSI晶片設計,將部份指紋辨識的軟體演算法以硬體化取代。演算法內容包括:二值化(binarization)、細線化(Thinning)、端點找尋(end point)以及分叉點找尋(bifurcation point)。其中可撓性的設計,將使得本設計架構可適應不同的演算法;可擴充性的設計,可使得所設計的晶片,擁有易於擴充影像遮罩尺寸的彈性空間。
研究成果估計可將整個指紋辨識演算法的1/3計算量實行硬體化。硬體化的價值除了可以加快運算處理速度、降低成本及縮小體積之外,並可作為未來與CMOS Image Sensor整合在一起成為單一指紋晶片設計做準備,有效達成階段性研究的貢獻。本研究特別著重硬體元件模組化設計,用以考量未來繼續發展的擴充性。同時建構一軟硬體整合驗證與測試平台,輔以印證本研究成果之正確性,使得本設計能更趨符合兼具學術創新與產業實用之雙重要求。
關鍵字:指紋辨識、影像前處理、特徵編碼、VLSI晶片設計
[1]林仲芬編譯, ”Pattern Recognition Technology II,” Chan Hwa Science & Technology Book Co., 1995.
[2]鄭凱駿, ”Personal Identification,” Institute of Biomedical Engineering National Cheng Kung University,1998.
[3]林正哲,”Fingerprint Verification System using Phase Correlation Technique,” Master Thesis Department of Industrial Education National Taiwan Normal University, 2000.
[4]Karu. K and Jain. A.K, ” Fingerprint Classification ,”Pattern Recognition, Vol. 29, pp. 389-404, 1996.
[5]林傳生, ”Digital Circuit Design of Using VHDL,” RU LIN Book Co., LTD, 2000
[6]胡振華, ”VHDL and FPGA Design,” CHAN HWA Science & Technology Book Co., LTD., 2001.
[7]唐佩忠, ”VHDL of Digital Logic Design,” GAU LIH Book Co., LTD, 2000.
[8]吳成柯等編譯,”Digital Image Process,” RU LIN Book Co., LTD, 1991.
[9] T. Y. Zhang and C. Y. Suen,“A Fast Parallel Algorithm for Thinning Digital Patterns,“Commun. ACM, pp. 236-239, 1984.
[10] Saint-John Chen, ” FPGA Hardware Design on Pipelined Image Skeletonization,” Master Thesis Institute of Computer and Information Science National Chiao Tung University, 1996.
[11] 李中天,”An Improved FPGA Design and Implementation for the Thinning of Binary Image Using 3x3 Mask, ”Master Thesis Department of Industrial Education National Taiwan Normal University, 1997.
[12] H.E. LU, P. S. P. WANG, “A Comment on “A Fast Parallel Algorithm for Thinning Digital Patterns”,” Commun. ACM, Vol. 29, No.3, pp. 239-242, 1996.
[13] C. Arcelli, G. Sanniti, “A One-Pass Two-Operation Process to Detect the Skeletal Pixels on the 4-Distance Transform,” IEEE Transactions on Pattern Analysis and Machine Intelligence, Vol. 11, No. 4, pp. 411-414, 1989.
[14] E. S. Deuch, “Thinning Algorithms on Rectangular Hexagonal and Triangular Array,” Commum. ACM, Vol. 15, pp. 827-837, 1992.
[15] Stefan Jung, Roland Thewes,“A Low-Power and High Performance CMOS Fingerprint Sensing and Encoding Architecture,“ IEEE J. Solid-State Circuits, Vol. 34, No. 7, pp. 978-984, 1999.
[16] A. Gasteratos,I. Andreadis,“Non-linear image processing in hardware,“Pattern Recognit., Vol. 33, pp. 1013-1021, 2000
[17] D. Crookes, K. Benkrid, A. Bouridane, K. Alotaibi and A.BenKrid, “Design and implementation of a high level programming environment for FPGA-based image processing,”IEE Proc.-Vis. Image Signal Process., Vol. 147, No. 4, pp. 377-384, 2000
[18]K.Z.Pekmestzi and N.Thanasouras, ” Systolic Frequency Divider/counters,” IEEE Transaction on Circuit and System-II:Analog and Digital signal processing, Vol. 41, No.11, pp. 775-776, 1994
[19] Danny Crookes, “Architectures for high performance image processing: The future,” Journal of Systems Architecture, Vol. 45, pp. 739-748, 1999
[20] Mauro Migliardi, “An efficiency model for general purpose instruction level
parallel architectures in image processing,” Computers and Electrical Engineering, Vol.26, pp. 245-259, 2000
[21]C.QueK, K.B. Tan, V. K. Sagar, “Pseudo-outer product based fuzzy neural network fingerprint verification system”, Neural Networks, Vol. 14, pp.305-323, 2001
[22]Xudong Jian, Wei-Yun Yan, Wee Ser, “Detecting the fingerprint minutiae by adaptive tracing the gray-level ridge”, Pattern Recognition, Vol. 34, pp.999-1013, 2001