研究生: |
柯奇恩 KE,Chi-En |
---|---|
論文名稱: |
多通道棘波分類系統之低功率ASIC電路設計 Efficient ASIC Architecture for Low-Power Multi-Channel Spike Sorting System |
指導教授: |
黃文吉
Hwang, Wen-Jyi |
學位類別: |
碩士 Master |
系所名稱: |
資訊工程學系 Department of Computer Science and Information Engineering |
論文出版年: | 2014 |
畢業學年度: | 102 |
語文別: | 中文 |
論文頁數: | 45 |
中文關鍵詞: | 棘波分類 、棘波偵測 、特徵擷取 、特殊應用積體電路 、非線性能量運算子 、通用賀賓學習法則 |
英文關鍵詞: | spike sorting, spike detection, feature extraction, ASIC, NEO, GHA |
論文種類: | 學術論文 |
相關次數: | 點閱:154 下載:1 |
分享至: |
查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報 |
本論文針對目前現有的棘波分類系統設計架構,並使用ASIC電路設計方式來實現此架構。本論文採用Nonlinear Energy Operator (NEO) 來偵測棘波,並搭配Generalized Hebbian Algorithm (GHA)演算法將偵測到的棘波進行特徵擷取。為了減少硬體資源的消耗,GHA架構中在計算調整不同組權重值時皆共享相同一塊計算電路。因此,本論文所提出的架構同時擁有較低的晶片面積,以即使用了台積電90奈米製程和對於功率消耗優化之技術,使得在功率消耗的這部分也有良好的表現。最後由於使用了多通道的訊號輸入,本論文在棘波分類系統的吞吐量能有大幅的提升。
[1]M.A. Lebedev and M.A.L. Nicolelis, “Brainmachine interfaces: past, present and future,” Trends in Neurosciences, Vol.29, pp.536-546, 2006.
[2] E.E. Fetz, “Real-time control of a robotic arm by neuronal ensembles,” Natural Neural Science,Vol. 2, 00.583-584, 1999.
[3] S. Hauck and A. Dehon, Reconfigurable Computing: The Theory and Practice of FPGA-Based Computing, Morgan Kaufmann: San Fransisco, CA, USA, 2008.
[4] Roy H. Olsson III ,” A Three-Dimensional Neural Recording Microsystem
With Implantable Data Compression Circuitry” IEEE Journal of solid-state circuits, Vol. 40, No. 12, December 2005
[5] Moo Sung Chae, Zhi Yang, Mehmet R. Yuce, Linh Hoang, and Wentai Liu,” A 128-Channel 6 mW Wireless Neural Recording IC With Spike Feature Extraction and UWB Transmitter” IEEE Transactions On Nerual Systems And Rehabillitation Egineering, Vol. 17, No. 4, Augest 2009
[6] Benoit Gosselin, Amer E. Ayoub, Jean-François Roy, Mohamad Sawan, FellowFranco Lepore, Avi Chaudhuri, andDaniel Guitton” A Mixed-Signal Multichip Neural Recording Interface With Bandwidth Reduction” IEEE Transactions On Biomedical Circutts And Systems, Vol. 3, No. 3, June 2009
[7] T.-C. Chen, W. Liu and L.-G. Chen,“VLSI Architecture of Leading Eigenvector Generation for On-chip Principal Component Analysis Spike Sorting System,” Proc. 30th Annual International IEEE EMBS Conference Vancouver, British Columbia, Canada, pp.3192-3195, 2008.
[8] J. F. Kaiser, “On a simple algorithm to calculate the ‘energy’ of a signal,” in Proc. IEEE Int. Conf. Acoust., Speech, Signal Process. (ICASSP ’90), Albuquerque, NM, Apr. 1990, vol. 1, pp. 381–384.
[9] S. Mukhopadhyay and G. Ray, “A new interpretation of nonlinear energy operator and its efficacy in spike detection,” IEEE Trans. Biomed.
Eng., vol. 45, no. 2, pp. 180–187, Feb. 1998.
[10] K. H. Kim and S. J. Kim, “Neural spike sorting under nearly 0-db signal-to-noise ratio using nonlinear energy operator and artificial neural-network classifier,” IEEE Trans. Biomed. Eng., vol. 47, no. 10, pp. 1406–1411, Oct. 2000.
[11] I. Obeid and P. D. Wolf, “Evaluation of spike-detection algorithms for a brain-machine interface application,” IEEE Trans. Biomed. Eng., vol. 51, no. 6, pp. 905–911, Jun. 2004.
[12] S.-J. Lin, Y.-T. Hung, and W.-J. Hwang, “Efficient hardware architecture based on generalized Hebbian algorithm for texture classification,” Neurocomputing, pp.3248-3256, 2011.
[13] N. Sudha, A.R. Mohan, P.K. Meher, “A self-configurable systolic architecture for face recognition system based on principal component neural network,” IEEE Trans. Circuits Syst. Video Technol, Vol. 21, pp.1071-1084, 2011.
[14] S. -J. Lin, W. -J. Hwang, andW. -H. Lee, “FPGA Implementation of Generalized Hebbian Algorithm for Texture Classification,” Vol. 12, pp.6244-6268, Sensors, 2012.
[15]S.-J. Lin, Y.-T. Hung, and W.-J. Hwang, “Efficient hardware architecture based on generalized Hebbian algorithm for texture classification,” Neurocomputing, pp.3248-3256, 2011.
[16] N. Sudha, A.R. Mohan, P.K. Meher, “A self-configurable systolic architecture for face recognition system based on principal component neural network,” IEEE Trans. Circuits Syst. Video Technol, Vol. 21, pp.1071-1084, 2011.
[17] S. -J. Lin, W. -J. Hwang, andW. -H. Lee, “FPGA Implementation of Generalized Hebbian Algorithm for Texture Classification,” Vol. 12, pp.6244-6268, Sensors, 2012.
[18] Y.-J. Yeh, H.-Y. Li, C.-Y. Yang, and W.-J. Hwang, ”Fast Fuzzy C-Means Clustering Based on Low-Cost High-Performance VLSI Architecture in Reconfigurable Hardware,” pp.112-118, IEEE International Conference on Computational Science and Engineering, 2010.
[19] Design Compiler® User Guide Version H-2013.03, March 2013
[20] Y. Sun, S. Huang, J. J. Oresko, and A. C. Cheng, “Programmable Neural Processing on a Smartdust for Brain-Computer Interfaces,” IEEE Trans. Biomedical Circuits and Systems, Vol. 4, pp.265-273, 2010.
[21] L. S. Smith and N. Mtetwa, “A tool for synthesizing spike trains with realistic interference,” Vol. 159, pp.170-180, Journal of Neuroscience Methods, 2007.
[22] S. Haykin, Neural Networks and Learning Machines, 3rd ed.; Pearson: Upper Saddle River, NJ, USA, 2009.
[23] T.D. Sanger, “Optimal unsupervised learning in a single-layer linear feedforward neural network,” Neural Network, Vol. 12, pp.459-473, 1989.